India's $11 Billion Chip Bet: Inside the Tata-ASML Deal That Could Reshape — or Repeat — the Country's Semiconductor Ambitions

On May 16, 2026, Tata Electronics and ASML — the Dutch company that holds a near-monopoly on the lithography machines essential to chipmaking — signed a Memorandum of Understanding to equip India's first commercial semiconductor fabrication plant [1]. The facility, under construction in Dholera, Gujarat, carries a price tag of ₹91,000 crore (approximately $11 billion) and aims to produce up to 50,000 wafers per month across technology nodes ranging from 28nm to 110nm [2][3].

The partnership is the most concrete step India has taken toward building a domestic chip manufacturing base. But concrete and ambition are not the same thing. India's last major semiconductor bid — a $19.5 billion Vedanta-Foxconn joint venture — collapsed in 2023 before a single wafer was produced [4]. Whether the Tata-ASML deal represents a genuine structural departure or a more polished version of the same gamble depends on answers to questions that neither company's press releases address.

The Deal: What Tata Is Getting and What It Costs

The Dholera fab is a 300mm (12-inch) facility — the industry standard wafer size for commercial chip production. Tata's technology partner for the fab itself is Taiwan's Powerchip Semiconductor Manufacturing Corporation (PSMC), which signed a definitive technology transfer agreement covering process nodes at 28nm, 40nm, 55nm, 90nm, and 110nm [5]. ASML's role is to supply its suite of deep ultraviolet (DUV) immersion lithography tools — specifically ArF (argon fluoride) immersion systems — along with workforce training, local supply chain development, and long-term R&D collaboration [1][6].

At $11 billion, the Dholera project is significant but not among the largest fab investments globally. TSMC's Arizona complex carries a $40 billion commitment; Intel's Ohio fabs are projected at $36 billion; Samsung's Taylor, Texas facility is $17 billion [7]. TSMC's Kumamoto plant in Japan, at roughly $11 billion, is the closest comparable in scale [7].

Source: Company announcements, government filings

Data as of May 22, 2026CSV

The difference is that those fabs target advanced nodes — TSMC Arizona will produce at 4nm and below — while Dholera's 28nm floor places it firmly in the "mature node" category [2][6]. This is not a deficiency per se; it is a strategic choice with specific market implications, discussed below.

The Subsidy Question: India's 50% Bet

The Indian government, through its India Semiconductor Mission (ISM), has committed 50% fiscal support on a pari-passu basis for eligible project costs [8][9]. This means the government co-invests alongside Tata at each milestone; if Tata slows down or reduces scope, government disbursements proportionally decrease [8]. A Fiscal Support Agreement was signed between ISM, Tata Electronics Private Limited (TEPL), and Tata Semiconductor Manufacturing Private Limited (TSMPL) for the full ₹91,526 crore project [9].

That 50% headline subsidy rate is the highest among major chipmaking nations. The U.S. CHIPS Act allocated $39 billion in manufacturing subsidies plus a 25% investment tax credit, but for individual projects, grants have typically covered roughly 25-35% of total investment [10][11]. The EU Chips Act relies heavily on member state funding, with direct European Commission contributions of only €3.3 billion against an overall €42 billion mobilization target; individual project subsidies have landed around 20% [11]. Japan has offered approximately 40% for projects like TSMC Kumamoto [11].

Source: Government policy documents

Data as of May 22, 2026CSV

When combined with state-level incentives from Gujarat — covering land, infrastructure, and tax breaks — effective government support could reach 60-75% of Dholera's project cost [8]. The downside risk structure matters: under the pari-passu model, taxpayers are co-invested at every stage. If the fab underperforms commercially, the government has limited recourse beyond halting future disbursements. There is no publicly disclosed clawback mechanism comparable to the U.S. CHIPS Act's guardrails on stock buybacks and excess profits [10].

The Equipment: DUV, Not EUV — and Why It Matters

ASML's most advanced product is its extreme ultraviolet (EUV) lithography system, which uses 13.5nm wavelength light to pattern features at 7nm and below. These machines, costing upwards of $200 million each, are subject to strict Dutch and U.S. export controls that currently prohibit sales to China [12][13].

India is not receiving EUV machines. The Tata-ASML deal covers DUV immersion lithography — specifically ArF immersion systems, which use 193nm wavelength light and are the workhorses of the 28nm-to-110nm manufacturing range [1][6]. DUV immersion tools are not currently subject to the same export restrictions as EUV systems, though the regulatory environment is shifting. The proposed U.S. MATCH Act would ban exports of DUV immersion systems to China and restrict servicing of existing equipment there [12]. India, however, is not a target of these restrictions and faces no apparent regulatory barrier to receiving DUV equipment.

For ASML, the deal carries minimal export control risk. India is a strategic partner of both the Netherlands and the United States, and DUV equipment sales to a non-restricted country do not trigger the same scrutiny that China-bound shipments do. The equipment caps Tata's production capability at roughly 28nm — advanced enough for the target markets but well below the frontier where geopolitical sensitivities concentrate.

The Workforce Gap: 300,000 Missing Professionals

India's semiconductor workforce currently stands at approximately 220,000 professionals [14]. The industry is projected to need over 500,000 workers by 2026 and faces a shortage of 250,000 to 300,000 professionals by 2027 [14][15]. The Dholera fab alone is expected to generate over 20,000 direct and indirect skilled jobs [3].

Source: Business Standard, ISM

Data as of May 22, 2026CSV

The gap is structural. India's higher education system has historically emphasized software engineering and IT services over hardware disciplines — semiconductor fabrication, process engineering, and equipment maintenance [14]. The government has announced that over 300 colleges will begin offering specialized semiconductor courses, and ISM 2.0 includes provisions for training centers combining academic research with industry needs [16]. But building a pipeline of process engineers and cleanroom technicians takes years, not months.

Tata's partnership with PSMC includes workforce training components, and the ASML MoU explicitly covers talent development [1][5]. Whether these programs can produce job-ready technicians at the scale and speed the fab requires remains an open question. The alternative — mass hiring of foreign engineers, particularly from Taiwan and South Korea — would work operationally but undercut the domestic capacity-building rationale that justifies the subsidy.

Why This Isn't Vedanta-Foxconn

The $19.5 billion Vedanta-Foxconn joint venture, announced in 2022, collapsed in July 2023 when Foxconn withdrew [4][17]. The failure had multiple causes: neither Vedanta nor Foxconn had semiconductor manufacturing experience; their proposed technology partner, STMicroelectronics, was reluctant to take an equity stake; and the Indian government delayed approvals partly because it wanted technology partners with more "skin in the game" [4][17].

The Tata-ASML partnership differs in several structural ways. First, Tata Electronics has established chip packaging (OSAT) operations in India and a track record of executing large industrial projects through the broader Tata Group [5]. Second, PSMC is a seasoned foundry operator — it runs fabs in Taiwan and has decades of process technology experience [5]. Third, the ASML partnership adds the world's dominant lithography equipment supplier as a committed stakeholder in the project's success, since ASML's equipment revenue depends on the fab reaching volume production [1].

The Dholera fab has also moved beyond the vaporware stage. As of April 2026, construction has reached approximately 45-50% completion, with foundation work finished and the project moving into cleanroom installation and equipment integration [18][19]. Trial production is expected by late 2026 [19]. The Vedanta-Foxconn venture never broke ground.

None of this guarantees success. Building a semiconductor fab is among the most technically demanding manufacturing challenges in the world, and first-time fab operators face steep learning curves on yield, quality, and cost control. But the structural preconditions — an experienced technology partner, a committed equipment supplier, physical construction progress, and a signed fiscal support agreement — are materially stronger than what Vedanta-Foxconn ever assembled.

The Market Case: Mature Nodes Are Not Obsolete

A common critique of the Dholera fab is that 28nm technology is "old" — and by the standards of leading-edge AI chip production, it is. TSMC began volume production at 28nm in 2011. But mature nodes (28nm and above) commanded $64.2 billion in foundry revenue in 2025 and held roughly 45% of the global semiconductor market [20].

The automotive sector is the anchor. About 80% of automotive semiconductors use mature node technology — microcontrollers, power management ICs, analog chips — because these applications prioritize reliability, radiation tolerance, and cost over transistor density [20][21]. Global automotive semiconductor revenue is projected to grow from $90 billion in 2025 to approximately $139 billion by 2031, a 7.5% compound annual growth rate [21].

S&P Global Mobility has warned of a potential mature-node semiconductor shortage in late 2025 and 2026, precisely because these nodes attract less investment than leading-edge processes while automotive demand continues to grow [20]. Tata's target applications — power management ICs, display drivers, microcontrollers, and high-performance computing logic — map directly onto this demand profile [3].

India's domestic market adds another layer. The country imports virtually all of its semiconductors, and as its automotive, consumer electronics, and defense industries grow, a local supply of mature-node chips could reduce import dependence while capturing value that currently flows to foundries in Taiwan, South Korea, and China.

Source: World Bank Open Data

Data as of Dec 31, 2024CSV

India's GDP grew at 6.5% in 2024 and has averaged above 6% annually over the past decade, driving steadily increasing domestic chip consumption across automotive, telecommunications, and consumer electronics sectors.

The Geopolitical Lens: Who Benefits More?

There is a credible argument that this partnership serves ASML's interests at least as much as India's. With China-bound DUV shipments under increasing regulatory pressure — China accounted for nearly a third of ASML's new tool sales in the first nine months of 2025 [22] — ASML needs new markets. India offers a government-subsidized customer, diplomatic alignment with Western export control regimes, and a long-term growth market as India's chip consumption rises [22][23].

From this perspective, ASML gains revenue diversification and geopolitical goodwill, while India assumes the sovereign risk of operating technology it does not yet fully control. Tata will depend on PSMC for process technology and ASML for equipment servicing and upgrades for years, possibly decades. If either partner withdraws support — as STMicro effectively did with Vedanta — India would be left with a multibillion-dollar facility it may not be able to operate independently.

The counterargument is that every country that has built a semiconductor industry started by importing technology. Taiwan's TSMC began with technology licensed from Philips (now NXP). South Korea's Samsung entered memory chips by licensing from Micron. Technology dependence is the starting condition, not the permanent state — provided the host country invests in absorbing and eventually advancing the technology domestically [6][23].

India's ISM 2.0 framework includes provisions for R&D centers and design ecosystem development, suggesting awareness that fabrication alone is insufficient [16]. Whether these programs receive the sustained funding and institutional attention needed to build genuine technological sovereignty is a question that will take a decade or more to answer.

Environmental and Infrastructure Costs

Semiconductor fabrication is extraordinarily resource-intensive. A modern fab can consume 2 to 4 million gallons of ultrapure water per day, generate hazardous chemical waste including hydrofluoric acid and solvents, and draw substantial electrical power [24].

The Dholera Special Investment Region (SIR) has been specifically developed to support heavy industry. The Gujarat government has fast-tracked a dedicated 1.5-gigawatt power grid for the region, and the Dholera Solar Park provides renewable energy capacity [24][25]. Desalination plants are being built to supply ultrapure water, addressing the fact that the semi-arid region cannot rely solely on freshwater sources [24][25].

Gujarat's semiconductor policy includes provisions for common effluent treatment plants and hazardous waste management facilities [24]. However, no independent environmental impact assessment for the Dholera fab has been made publicly available as of this writing. The environmental clearances that have been obtained are part of the broader Dholera SIR development process, not fab-specific evaluations [25].

This is a gap. The communities surrounding Dholera — largely agricultural — will bear proximity to chemical handling, increased truck traffic, and potential groundwater contamination risks. Whether the infrastructure investments being made are adequate to mitigate these impacts is a question that an independent, publicly accessible assessment should answer before the fab reaches full operation.

What Comes Next

The Dholera fab is expected to begin trial production by late 2026, with commercial ramp-up following in 2027-2028 [19]. If it succeeds, it will validate India's semiconductor manufacturing ambitions and likely attract additional investment from global chipmakers evaluating alternatives to concentrated production in Taiwan and South Korea.

If it stumbles — on yield problems, workforce shortages, or market timing — the Indian taxpayer's exposure through the 50% subsidy makes the failure a public fiscal event, not just a private business loss.

The Tata-ASML partnership is, by the available evidence, the most credible attempt India has made to enter semiconductor manufacturing. The technology is proven, the partners are experienced, the construction is underway, and the target market is real. The risks — workforce gaps, technology dependence, environmental costs, and execution complexity — are equally real. India's chip ambitions have reached the point where they will be tested not by announcements, but by wafers.